All Forums > Programming Questions

Bi directional port in a library example?

(1/2) > >>

Zap:

I am useing port 2 on my DIY wiring board as a bi directional port (bus) and works fine accessing it using a sketch such as below. (port 1 is used as the chip /latch select)

// function getiptbyte gets the data byte on the input latch
byte getiptbyte (){
  portMode(2, INPUT);       // flips the bus port to input
  portWrite(1, 0x80);       // sets the latch for the input buffer
  ipt = portRead (2);       // reads the data on the buss port
  portWrite(1, 0x00);        // turns off the input latch
  portMode(2, OUTPUT);      // resets the bus port to output
  return ipt;
}

However when I try to move this into a class library (As below) it does not read the data on the bus for some reason. Is this the correct way to manipulate the portmode in a libary? and is there any example librarys with a port being used as Bi-directional?

 // member: getiptbyte gets the data byte on the input latch
byte iWire::getiptbyte (){
  portMode(2, INPUT);       // flips the bus port to input
  portWrite(1, 0x80);       // sets the latch for the input buffer
  ipt = portRead (2);       // reads the data on the buss port
  portWrite(1, 0x00);       // turns off the input latch
  portMode(2, OUTPUT);      // resets the bus port to output
//  ipt = (0xAA);           // Used only to test that the return works.
  return ipt;
}


Thanks Zap.

bhagman:
This sounds like either some sort of compiler optimization, or something else going on in the compiler.

Have you got some way to check the ports (i.e. multimeter or oscilloscope) to see what is happening when you set the ports?

Can you provide a simple sketch to use (both with the library and without) so others can test it out?

Zap:
Yes it looks like compiler optimisation. I dug out the DSO and found a difference in the chip select timeing pulses comming out of port 1 ( PC7) in each case.

For a function in a sketch of only
  portWrite(1, 0x80);       // sets the latch for the input buffer
  portWrite(1, 0x00);        // turns off the input latch
the output pulse length is 1.56 us ( 25 clk cyc)

However for a lib call of the same (above),  the pulse length is 60-61 ns ( 1 clk cycle).

This shorter lib pulse has caused the latch not to be settled in time for the read. (there is also a PAL16V8B that does the binary to 1 of chip selection for the bus chips between the MCU and them)

I tried a 1 microsecond delay in the lib call to allow the latch to settle and this works OK as below.

  portWrite(1, 0x80);       // sets the latch for the input buffer
  delayMicroseconds(1);     // delay to let latch settle
  ipt = portRead (2);       // reads the data on the buss port
  portWrite(1, 0x00);        // turns off the input latch

Now that I know what the problem is,  how do I add a few Nop to the lib instead of the 1 us delay?

And Why is there such a big compiled difference ( 1 & 25 cycles) between the sketch and the lib?

Thanks Zap.

bhagman:
Can you run this on your sketch? (both of them)

WiringLocation/hardware/tools/avr/bin/avr-objdump.exe -h -S sketchname.elf > sketchname.lss

you will find the .elf file in the build folder of your sketch.

then compress (zip or whatever) the two .lss files and attach them to a post in here.

I want to have a look at what's going on.

Zap:
Brett, I had trouble at first but after copying all the cyg*.dll's to the tools\bin folder I got it to dump them.

Let me know if you need anything more,

 Zap.
 

Navigation

[0] Message Index

[#] Next page

Go to full version