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Messages - Gogol

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Hello,

I try to adapt the wiring libraries for the use with an attiny861A
http://www.atmel.com/Images/8197S.pdf

I am running into trouble in the file: WInterrupts.c
function interruptMode

The attiny861A has two external interrupts, but only the register-bits ISC00 and ISC01, which are defined in the file iotn861a.h from the avr-toolchain.

I am running now into trouble, as the function interruptMode assumes, that with two external interrupts ISC10 should be defined.

In the datasheet of the attiny861A page51 is stated:
"The low level of INT0 or INT1 generates an interrupt request."
which I read, as both interrupts are sharing those registers.

Has anybody some experience with that? How the source can be fixed/adapted, that it will compile for the attiny861A ?

Thanks for any hint!


regards

  gogol

P.S. After further investigation, I can state, that there is one big difference between atmega and attiny controllers, regarding the external interrupt.
For the atmegas there is usually a 1-to-1 relation between an external interrupt and the "interrupt sense control" bit x0 and x1.
The attinys are sharing the ISCx0 and ISCx1 bit for a group of external interrupts.

So there must be a mapping, which ISC-bit controls which interrupt, depending on the core.

Furthermore i have the impression, that the code in WInterrupts.c is damaged regarding the ISC-bit modes.

When I looked in a version from about 2010 it looked like:
(even it was not complete)
Code: [Select]
          case EXTERNAL_INTERRUPT_0:
          EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
          EIMSK |= (1 << INT0);
          break;

Whe I look into the current version, i have downloaded yesterday, it looks like:

Code: [Select]
      case 0:
        EIMSK &= ~(1 << INT0);
        EICRA = (EICRA & ~(0b11 << ISC00)) | (mode << ISC00);
        EIMSK |= (1 << INT0);
        break;

here is the ISCx0 bit used twice, while the ISCx1 bit is not longer used.

That is valid for all ISC-statements.

For all atmel cores, the behavior is the same:

ISCx0
ISCx1
behavior
00The low level of the corresponding extINTx generates an interrupt request.
01Any level change of the corresponding extINTx generates an interrupt request.
10The falling edge of the corresponding extINTx generates an interrupt request.
11The rising edge of the corresponding extINTx generates an interrupt request.

Spoken of this the library allows currently only the case 00 or 11 (as far as I understand)
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